K20 Center, University of Oklahoma·Norman, OK

• Develop and deploy front-end and back-end web applications and Unity/C# educational games used by K–12 teachers and students; test across Center projects, reproducing and filing defects
• Built and shipped Hive, a classroom platform for curating and publishing boards of links, images, and video; owned the stack from PostgreSQL schema through REST API to deployed React SPA

University of Oklahoma IT·Norman, OK

• Administer identity and access management and Microsoft 365 services across 30,000+ user accounts, automating account provisioning and recurring administrative workflows with PowerShell
• Operate on a five-person cross-functional team handling ticket-driven telecom, account, and backend operations requests, sustaining a 98.4% satisfaction rate

SystemVerilog · Python · Verilator · Vivado · Basys 3 · GTKWave

• Designed a synthesizable RV32I core in SystemVerilog, extending a single-cycle implementation into a 5-stage pipeline with forwarding paths, load-use hazard detection and stall insertion, and predict-not-taken branch handling with pipeline flush
• Built a constrained-random verification environment generating RISC-V programs and differentially comparing architectural state (register file, PC, memory) against an instruction-set simulator, with coverage tracking and a regression test per bug caught
• Deployed the core to a Basys 3 FPGA with a memory-mapped UART peripheral, closing timing in Vivado and documenting the critical path from post-implementation reports

C · ARM assembly · STM32F446 · arm-none-eabi-gcc · OpenOCD · GDB

• Wrote startup code and a custom linker script from the STM32F446 reference manual with no HAL, CubeMX-generated code, or vendor RTOS, handling vector table setup, .data/.bss init, and clock configuration through direct register access
• Implemented a preemptive priority scheduler with per-task control blocks and stacks, PendSV context switching (manual R4–R11 save/restore, PSP swap, EXC_RETURN), SysTick time slicing, and mutexes with priority inheritance to prevent inversion
• Developed register-level GPIO, UART, I2C, and SPI drivers; measured context-switch latency with the DWT cycle counter, validated bus timing on a logic analyzer, and diagnosed hard faults via CFSR/HFSR/MMFAR/BFAR in GDB

C++ · Python · AVX2 · OpenMP · Emscripten

• Implemented GPT-2 inference from scratch in C++, including tokenization, transformer blocks, multi-head attention, KV caching, sampling, and tensor ops, without an ML inference framework
• Optimized CPU inference with cache-aware matmul, SIMD, and multithreading; implemented INT8/INT4 quantization, validated against a Hugging Face reference

CUDA C++ · Nsight Compute · PyTorch

Rust · tokio · proptest · criterion

TypeScript · JavaScript · SQL · React · AdonisJS · PostgreSQL · Vite